5/24(월) 세미나 안내

* 주제 : Implementing Flexible and Efficient Data-Parallel Cores with Vector-Threading

* 강사 : 이윤섭 (U.C.Berkeley)
* 일시: 5/24(월) 11~12시
* 장소: 과학관 223호

* Abstract:
Serious technology issues are breaking down the traditional abstractions in
computer engineering. Power and energy consumption are now first-order design
constraints and the road map for standard CMOS technology has never been more
challenging. In response to these technology issues, computer architects are
turning to multicore and manycore processors where tens to hundreds of cores
are integrated on a single chip. However, this breaks down the traditional
sequential execution abstraction forcing software programmers to parallelize
their applications. This talk will introduce a new architectural approach
called vector-threading (VT) which is a first step to addressing these
challenges. Vector-threading combines the energy-efficiency and simple
programming model of vector execution with the flexibility of multithreaded
execution. We have implemented various cores suitable for data-parallel
execution using a semi-custom ASIC methodology in a TSMC 65 nm process, and the
resulting placed-and-routed gate-level models are used to evaluate the
performance, area, and energy of several compiled microbenchmarks and
application kernels. Our results indicate that vector-threading can offer the
flexibility of multithreading-based cores while maintaining the area- and
energy-efficiency of vector-based cores.

* Short bio:

Yunsup Lee is a Ph.D. student in the Electrical Engineering and Computer
Science Department at the University of California, Berkeley in the Parallel
Computing Laboratory. He holds a B.S. in Electrical Engineering and Computer
Science from Korea Advanced Institute of Science and Technology. His research
interests include energy-efficient parallel computer architecture, VLSI design,
and parallel programming models.